1. Technical Field of the Invention
The present invention relates to integrated circuits and more particularly to isolated-gate field-effect transistors.
2. Description of Related Art
The development of CMOS technologies (isolated-gate field-effect complementary transistors) is currently facing several problems, the primary ones of which are the effects of short channels and the mobility of the carriers. It will be recalled here that a short channel, that is to say one having a very small distance (length) between the source and the drain, results in a reduction in the threshold voltage of the transistor, which may in the extreme case result in it being very difficult to control transistor operation.
At the present time, considerable research is going into the development of architectures that can remedy the problems of “short channel” effects and of carrier mobility. However, until now researchers have been confronted with incompatibility between the respective solutions to these two problems. This is because, under voltage, strained silicon channels provide carriers of greater mobility. However, once this type of channel has been produced in a transistor with a very short channel, it then becomes necessary for the channel to be highly doped so as to counteract the effects of short channels. But such doping inevitably reduces, or even eliminates, the gain in mobility intrinsically obtained by the use of a strained channel.
The present invention aims to provide a solution to this problem.